Averroes Ai Automated Visual inspection software
PartnersCompany
Back
Semiconductor

Photoresist Inspection After Coat: Defect Types, Detection Methods and Tools

Averroes logo
Averroes
Oct 27, 2026
Photoresist Inspection After Coat: Defect Types, Detection Methods and Tools

Photoresist inspection is the quality gate that checks a resist-coated wafer before it is exposed, verifying film thickness, uniformity and freedom from coating defects such as bubbles, striations, comets and edge bead anomalies. It runs after spin coating and soft bake, using thickness metrology and whole-wafer macro inspection. A second gate, post-develop inspection, checks the printed pattern after develop. This page covers the coat side.

Resist inspection is a gate inside Stage 03 of the 12-stage semiconductor manufacturing process, within the photolithography process. This guide from Averroes.ai, an AI visual inspection platform for manufacturers, maps each coat defect to the step that creates it, the tool that catches it and the cost of getting the call wrong.

Key Notes

  • Resist inspection runs at two gates: after coat and soft bake, and again after develop. This page covers the coat gate.
  • Each coat sub-step can create its own defect class: dispense causes bubbles and comets, spin causes striations, bake causes thickness drift.
  • A resist defect caught before expose is strippable and recoatable; the same defect printed and etched into the wafer is permanent.
  • Macro inspection sees the whole wafer at once but reports anomalies, not identities. Classification sets the false count rate at the coat gate.

What Is Photoresist Inspection and Why Does It Run Before Expose?

Photoresist inspection is the set of measurements and scans that qualify a coated wafer’s resist film before exposure: thickness, uniformity, and freedom from coating defects. The gate exists because of what sits on either side of it. A failed coat caught here is stripped and recoated at the cost of one track cycle. The same flaw exposed, developed and etched is in the silicon, and every die it touched is gone. That makes after-coat inspection the cheapest catch point in the entire litho cell.

Photoresist coat defects at a glance

Defect Created At Looks Like on the Tool Caught By
Thickness non-uniformity Spin, soft bake Radial color shift Reflectometry map
Edge bead anomaly Spin, EBR Thick or ragged rim ring Macro, edge inspection
Bubbles and pinholes Dispense Dark round voids Macro inspection
Striations Spin Radial streak pattern Macro inspection
Comets Particle at spin Teardrop streak Macro inspection
Dewetting HMDS priming Resist pulled back, bare patches Macro inspection
Particles Handling, environment Point light scatterers Macro, review scope

Where Inspection Sits in the Litho Cell

The litho cell runs coat, soft bake, after-coat inspection, exposure, post-exposure bake, develop and post-develop inspection as one track sequence. The coater-developer track and the exposure tool hand wafers back and forth, and the two inspection gates bracket the exposure: one qualifies the blank film going in, the other qualifies the printed pattern coming out. Everything between them belongs to the wafer fabrication stage of the lifecycle, where lithography, etch and deposition cycle until the device is built.

The litho cell sequence from coat to post-develop inspection, with the after-coat and post-develop inspection gates highlighted.

The diagram makes one point: exposure is the commit point. Everything before the first gate is reworkable; everything after the second is bounded by what etch will make permanent.

What Defects Form in Photoresist After Coating?

Coat defects are film and surface flaws created during dispense, spin and soft bake, before the wafer ever sees the reticle. Each sub-step has its own signature, which is what makes classified inspection data useful: the defect class points back at its cause.

The gallery carries the section’s takeaway: each defect family has a recognizable shape, and the shape names the sub-step that created it.

Thickness Non-Uniformity

Thickness non-uniformity is a resist film whose thickness varies across the wafer beyond its specification, caused by spin speed drift, exhaust imbalance or a bake plate running out of its temperature window. Resist thickness sets exposure dose coupling, so a thickness gradient becomes a critical dimension gradient at expose. It shows up on a reflectometry map before it shows up in printed features.

Edge Bead and Edge Bead Removal (EBR)

The edge bead is the ring of thickened resist that surface tension leaves at the wafer rim during spin. Edge bead removal (EBR) dissolves it with a solvent stream, or exposes and develops it away, leaving a defined exclusion band at the edge. The step is checked, not assumed: a ragged or incomplete EBR line leaves resist on the bevel that flakes into particles in later tools, and an oversized exclusion band gives away edge die. Inspection confirms the EBR line’s position, width and cleanliness.

Cross-section of the wafer edge showing the resist edge bead and the edge bead removal line with its exclusion width.

The cross-section’s takeaway in one line: EBR trades a few millimeters of edge for a rim that sheds no particles.

Bubbles and Pinholes

Bubbles are air pockets trapped in the resist at dispense, from entrained air in the line or an outgassing film, and pinholes are the small voids they leave when they break. Both are thin or open spots in the film. At expose they print as unintended features or leave the substrate unprotected at etch, so even small counts matter.

Striations

Striations are radial streaks of alternating film thickness left by uneven solvent evaporation during spin. They read as a spoke pattern on a whole-wafer image. Their thickness ripple translates into a critical dimension ripple across every field they cross.

Comets

Comets are teardrop-shaped streaks formed when a particle sits on the wafer during spin and the resist flows around it. The particle is the head and the thin wake is the tail. The particle itself may block exposure, and the tail is a thickness defect of its own.

Dewetting and Adhesion Failure

Dewetting is the resist pulling back from the wafer surface into droplets or bare patches, usually from a failed HMDS priming step or surface contamination. A dewetted region has no resist to pattern, so the full area it covers is lost at etch. It is conspicuous on macro inspection, which is the point of looking before expose.

How Are Resist Defects Detected? Methods and Tools

After-coat inspection combines thickness metrology on sample points with whole-wafer macro inspection for defects, and sends what the macro tool flags to microscope review.

Thickness and Uniformity Metrology

Spectroscopic reflectometry measures resist thickness optically: the tool reads the interference spectrum of light reflected from the film stack and fits it to a thickness value, without touching the resist. Measured on a point map across the wafer, it turns film thickness into a contour that shows spin and bake problems as patterns, a radial gradient for spin speed, an asymmetry for exhaust or plate tilt.

Whole-Wafer Macro Inspection

Macro inspection images the entire coated wafer at low magnification in one pass and flags anomalies: the striations, comets, bubbles, dewetting and edge bead problems cataloged above. It is fast enough to run inline inside the track sequence, which is what makes a true gate possible. Its limit is identity. A macro tool reports that something deviates from the expected film, not what that something is, and automated defect classification is what turns its anomaly list into named defect classes.

Whole-wafer macro inspection view with flagged sites feeding a microscope review queue.

The schematic’s takeaway: macro finds, review confirms, and everything between those two steps is queue time inside the litho cell.

Microscopy Review

Flagged sites go to microscope defect review for a closer look. Bright field inspection shows the defect in reflected light and resolves its shape; dark field inspection catches small scatterers such as particles that bright field washes out. Because photoresist is photosensitive, review of coated wafers uses filtered illumination, yellow or amber light or fluorescence setups, that will not expose the film being inspected.

One boundary is worth stating: CD-SEM metrology measures printed feature dimensions after develop. It belongs to the pattern side of the cell, not to the coated-film gate this page covers.

After-Coat vs Post-Develop Inspection

After-coat inspection qualifies the unexposed film; post-develop inspection (PDI) qualifies the printed pattern before etch commits it. The two gates ask different questions. The coat gate asks whether the film is fit to expose: right thickness, uniform, free of coating defects. The develop gate asks whether the pattern printed correctly: no bridging, no missing features, no scumming left where resist should have cleared.

They also carry different stakes. A coat failure costs a strip and recoat. A develop failure caught at PDI still allows rework, but the same defect missed there is etched into the wafer. Post-develop inspection has its own guide covering the pattern-side defect classes and tools.

Where AI Classification Fits at the Coat Gate

AI defect classification sorts what macro inspection and review microscopes already detect into real coat defect classes and nuisance, without new hardware. The coat gate needs it for one structural reason: macro tools trade sensitivity against false counts. Raise sensitivity to catch smaller bubbles and thinner comet tails, and nuisance detections rise with it. Every false count either holds a lot or sends a wafer to manual review, inside a track sequence where queue time is throughput.

Classification also turns the gate’s output into process feedback. Each defect class points at a cause: comets at particles during spin, striations at solvent evaporation, bubbles at the dispense line, edge anomalies at EBR. Trending classified defects by lot, tool and dispense line turns a recurring signature into a maintenance action instead of a recurring hold.

Averroes.ai runs AI defect classification as an overlay on the macro inspection and review tools already installed in the track area. It trains classification models from 20 to 40 labeled images per defect class, with no code, and deploys on premise so wafer image data stays inside the fab. It augments the installed inspection tools; it does not replace them.

Too Many False Calls at the Coat Gate?

See AI defect classification on your own resist inspection images

 

Frequently Asked Questions

What is photoresist in semiconductors?

Photoresist is the light-sensitive polymer film that transfers a circuit pattern onto a wafer. It is spin-coated over the wafer, exposed through a reticle, and developed so that resist remains only where it should protect the layer below during etch or implantation. Its quality as a film decides how faithfully the pattern prints.

What does photoresist inspection detect?

After-coat inspection detects film and surface flaws created during coating: thickness non-uniformity, edge bead anomalies, bubbles and pinholes, striations, comets, dewetting and particles. Thickness metrology maps the film, and whole-wafer macro inspection flags visible defects, with microscope review confirming what the macro tool found.

What is edge bead removal (EBR)?

Edge bead removal is the step that strips the ring of thickened resist that spin coating leaves at the wafer rim, using a solvent stream or an edge exposure. It leaves a clean exclusion band so the bevel sheds no resist particles in later tools. Inspection then confirms the EBR line’s position, width and cleanliness.

What is the difference between after-coat and post-develop inspection?

After-coat inspection checks the unexposed resist film for coating defects and thickness before the wafer is exposed. Post-develop inspection (PDI) checks the printed pattern after develop, for bridging, missing features and scumming, before etch makes the result permanent. The first gate qualifies the film; the second qualifies the pattern.

Can a wafer with a resist defect be reworked?

Yes, if the defect is caught before etch. A coat defect means the resist is stripped and the wafer recoated, costing one track cycle. A pattern defect found at post-develop inspection can also be stripped and reworked. Once the pattern is etched, the error is in the wafer and the affected die are lost.

What does a photoresist defect look like?

Each coat defect has a recognizable shape on a whole-wafer image: striations appear as radial spokes, comets as teardrop streaks behind a particle, bubbles as dark round voids, dewetting as bare patches, and an edge bead anomaly as a thick or ragged ring at the rim. The defect gallery image on this page shows each one labeled.

Related Blogs

What Is the Czochralski Process? How Silicon Crystals Are Grown for Semiconductors
Semiconductor
What Is the Czochralski Process? How Silicon Crystals Are Grown for Semiconductors
Learn more
Wafer Polishing and Surface Preparation: How Semiconductor Substrates Reach Mirror Flatness
Semiconductor
Wafer Polishing and Surface Preparation: How Semiconductor Substrates Reach Mirror Flatness
Learn more
Top Silicon Wafer Manufacturers and Suppliers in 2026
Semiconductor
Top Silicon Wafer Manufacturers and Suppliers in 2026
Learn more
See all blogs

Experience the Averroes AI Advantage

Elevate Your Visual Inspection Capabilities

Request a Demo Now

Averroes Ai Automated Visual inspection software
demo@averroes.ai
415.361.9253
55 E 3rd Ave, San Mateo, CA 94401, US

Products

  • Defect Classification
  • Defect Review
  • Defect Segmentation
  • Defect Monitoring
  • Defect Detection
  • Advanced Process Control
  • Virtual Metrology
  • Labeling

Industries

  • Oil and Gas
  • Pharma
  • Electronics
  • Semiconductor
  • Photomask
  • Food and Beverage
  • Solar

Resources

  • Blog
  • Webinars
  • Whitepaper
  • Help center
  • Barcode Generator

Company

  • About
  • Our Mission
  • Our Vision

Partners

  • Become a partner

© 2026 Averroes. All rights reserved

    Terms and Conditions | Privacy Policy | Data Processing Agreement